The following references are also incorporated by reference herein:    Mark Johnson, U.S. Pat. No. 5,652,445 (July, 1997).    Mark Johnson, U.S. Pat. No. 6,140,838 (October, 2000).    Mark Johnson, B. R. Bennett, P. R. Hammar and M. M. Miller,    “Magnetoelectronic Latching Boolean Gate,” Solid-State Electronics 44, 1099 (2000).    Sungjung Joo, Mark Johnson, et al., “Magnetic Field Controlled Reconfigurable Semiconductor Logic,” Nature 494, 72-75 (2013).    Mark Johnson, “Magnetic Logic: Fundamentals, Devices, and Applications,” Wiley Encyclopedia of Electrical and Electronics Engineering, ed. John Webster, (John Wiley and Sons, Inc., Hoboken, N.J., 2015).    Mark Johnson, U.S. Pat. No. 9,024,656 (May, 2015).
U.S. Pat. No. 9,024,656 by the present inventor (incorporated by reference herein), describes a system and method for performing low power logic operations. Whereas logic operation performed with traditional semiconductor technology relies on periodic synchronized pulses from a clock, operation of the low power technique uses individual pulses. In the former case, the logic system is constantly powered on. In the latter case, the quiescent state of the system is off. Power is applied only during the brief intervals when individual pulses are required. At all other times, the system draws no power. In 656, this novel kind of digital logic processing is called nonvolatile logic.
The invention described in '656 was motivated by the development of a novel device, the magnetic field controlled avalanche diode (MFCAD). The MFCAD is described in the article (Nature, 2013) and in U.S. Pat. No. 9,331,266 B2 (Joonyeon Chang, Mark Johnson et al., “Magnetic Field Controlled Reconfigurable Semiconductor Logic Device and Method for Controlling Same”). This device can behave as a nonvolatile reconfigurable Boolean logic cell. Patent '656 showed how the reconfigurable cell could be used for constructing logic building blocks, including as an Arithmetic Logic Unit (ALU) that performs binary logic operations. The patent then developed and presented an architecture for a nonvolatile digital logic and signal processing system. Dramatic power savings can be achieved because the normal operational state is “off.” When an operation is required, individual pulses are applied and, when the operation is complete, the results are stored in nonvolatile memory and the system returns to the quiescent, zero power condition.
The magnetic field controlled avalanche diode is a type of magnetoelectronic device where the output is an electric current. Most magnetoelectronic devices, for example the spin valve (SV) and the magnetic tunnel junction (MTJ), are magnetoresistors. They behave as variable resistors with bistable LOW and HIGH resistance values that are associated with binary 0 and 1. The resistance state is a function of the magnetization orientation of one (the free ferromagnetic layer) of two ferromagnetic layers in the SV or MTJ. The resistance state can be set (i.e. written) using a magnetic field to set a magnetization orientation state. For integrated devices, the magnetic field is associated with an electric current. The write current may be applied through an inductively coupled write wire and produces a local magnetic field. Alternatively, the write current may be a spin polarized current injected directly into the ferromagnetic layer. The resistance state of the magnetoresistor then is sensed (i.e. read out) by applying a bias and measuring the resistance. The resistance state of the SV and MTJ is detected by electric transport properties associated with a spin polarized current that transits both ferromagnetic layers. Because magnetoresistors typically have a large resistance value, the bias is commonly a current and the output is read out is a voltage.
Thus, a typical magnetoelectronic device has current input and voltage output. These characteristics are ideal for nonvolatile memory but are problematic for logic. Digital logical processing requires multiple operations. One gate is linked to subsequent gates by fanout, with the output of one gate providing the input to one or more subsequent gates. Fanout requires that device output preferably should be a reliable and reproducible current source.
In the MFCAD, the channel of an avalanche diode has resistance values that depend on the orientation of an applied magnetic field. The diode typically is biased by a voltage and the output is a current that depends on the magnetic field. The MFCAD differs from the SV and MTJ because detecting the output does not involve spin polarized current flowing in the channel of the device. For the integrated MFCAD, the external magnetic field is provided as a local fringe magnetic field near the ends of one or more patterned ferromagnetic elements. The magnetization states of the ferromagnetic elements, and therefore the locally applied fields, are bistable and nonvolatile.
Thus, the MFCAD is characterized as a device with bistable magnetization configurations that are set by applying an input write current to patterned ferromagnetic elements in the MFCAD device cell. For read out, the diode channel is biased with a voltage to give an output in the form of a current, with bistable output current values that depend on the locally applied magnetic field, and therefore depend on the magnetization configuration of the ferromagnetic elements. As such, it is well suited for use in circuits with other MFCADs, or with other magnetoelectronic devices, where the input is required to be a current. A disadvantage of the MFCAD is that while it is a promising device, it is in an early stage of research and development and has not been commercialized.
The MFCAD has demonstrated basic reconfigurable functions. As described in (Nature, 2013) and '266, one embodiment of an MFCAD reconfigurable cell can be reconfigured to perform an AND or OR function. A different embodiment can be reconfigured to perform a NAND or NOR function. The architecture described in '656 is general and works for an ALU that can be reconfigured to perform more than two Boolean functions. However, the example presented in '656 involved an ALU that could be reconfigured to perform two functions, the AND or OR function.